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2015-ISSCC-C.-Weltin-A-Highly-Digital-Frequency-Synthesizer-Using-Ring-Oscillator-Frequency-to-Digital-Conversion-and-Noise-Cancellation.pdf

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2015-ISSCC-C.-Weltin-A-Highly-Digital-Frequency-Synthesizer-Using-Ring-Oscillator-Frequency-to-Digital-Conversion-and-Noise-Cancellation.pdf
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CICC_2017_paper.pdf
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2004-JSSC-S.-Pamarti-A-Wideband-2.4-GHz-Delta-Sigma-Fractional-N-PLL-With-1-Mbps-In-Loop-Modulation.pdf
PDF 3 years ago 1.33 MB
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2004-ISSCC-E.-Siragusa-A-Digitally-Enhanced-1.8V-15b-40MSps-CMOS-Pipelined-ADC.pdf
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2004-JSSC-S.-Ye-Techniques-for-Phase-Noise-Suppression-in-Recirculating-DLLs.pdf
PDF 3 years ago 1.07 MB
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2002-ISSCC-S.-Ye-A-Multiple-Crystal-Interface-PLL-with-VCO-Realignment-to-Reduce-Phase-Noise.pdf
PDF 3 years ago 468.35 kB
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2007-SVLSIC-K.-Chan-A-150MSps-14-bit-Segmented-DEM-DAC-wilth-Greater-than-83dB-of-SFDR-Across-the-Nyquilst-band.pdf
PDF 3 years ago 2.31 MB
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2009-ISSCC-A.-Panigada-A-130mW-100MSps-Pipelined-ADC-with-69dB-SNDR-Enabled-by-Digital-Harmonic-Distortion-Correction.pdf
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2006-ISSCC-K.-Chan-A-14b-100MSps-DAC-with-Fully-Segmented-Dynamic-Element-Matching.pdf
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2012-SVLSIC-G.-Taylor-A-Reconfigurable-Mostly-Digital-Delta-Sigma-ADC-with-a-Worst-Case-FOM-of-160dB.pdf
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2010-ISSCC-G.-Taylor-A-Mostly-Digital-Variable-Rate-Continuous-Time-ADC-Delta-Sigma-Modulator.pdf
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1998-ISSCC-I.-Galton-A-Delta-Sigma-PLL-for-14b-50-kSampleps-Frequency-to-Digital-Conversion-of-a-100MHz-FM-Signal.pdf
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2000-JSSC-E.-Fogleman-A-3.3-V-Single-Poly-CMOS-Audio-ADC-Delta-Sigma-Modulator-with-98-dB-Peak-SINAD-and-105-dB-Peak-SFDR.pdf
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2015-JSSC-C.-Venerus-A-TDC-Free-Mostly-Digital-FDC-PLL-Frequency-Synthesizer-With-a-2.8-3.5-GHz-DCO.pdf
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2007-ISSCC-A.-Swaminathan-A-Wide-Bandwidth-2.4GHz-ISM-Band-Fractional-N-PLL-with-Adaptive-Phase-Noise-Cancellation.pdf
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