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A High Throughput_Gate AES Hardware Architecture by Compressing Encryption and Decryption Datapaths — Toward Efficient CBC-Mode Implementation - Rei Ueno, Sumio Morioka, Naofumi Homma, Takafumi Aoki.pdf

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A High Throughput_Gate AES Hardware Architecture by Compressing Encryption and Decryption Datapaths — Toward Efficient CBC-Mode Implementation - Rei Ueno, Sumio Morioka, Naofumi Homma, Takafumi Aoki.pdf
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